1. Field of the Invention
This invention relates to a NAND flash memory using, for example, an EEPROM, and more particularly to a multi-level semiconductor memory device capable of storing multivalued data in a single memory.
2. Description of the Related Art
In a NAND flash memory, a plurality of memory cells arranged in the column direction are connected in series, thereby configuring a NAND cell. Each NAND cell is connected via a select gate to the corresponding bit line. Each bit line is connected to a latch circuit which latches write or read data. All or half of the cells arranged in the row direction are selected simultaneously. All or half of the cells simultaneously selected are written to or read from in unison (for example, Jpn. Pat. Appln. KOKAI Publication No. 2004-192789).
With the recent trend toward larger memory capacity, a multivalue memory which stores 2 or more bits in a cell has been developed. For example, to store 2 bits in a cell, it is necessary to set four threshold distributions. To store 3 bits, it is necessary to set eight threshold voltages. These threshold voltages have to be set in a range that does not exceed the read voltage. Therefore, in writing data, a write voltage is supplied to the control gate of the memory cell to change the threshold voltage, thereby verifying whether the threshold voltage has reached the threshold voltage corresponding to specific data. If the threshold voltage has not reached the specific threshold voltage, the write voltage supplied to the word line is increased a little and then the write operation is repeated. In this way, the threshold voltage of the memory cell is set. As described above, in the multivalue memory, the write operation and verify operation have to be repeated.
A write voltage is generated using a pump circuit and a limiter circuit. The limiter circuit generates a specific voltage by changing the resistance ratio according to the input signal. On the basis of the specific voltage, the pump circuit is controlled, thereby generating a specific voltage. The pump circuit is designed to be capable of setting a plurality of minimum generated voltages according to the input data.
However, in the multivalue memory, it is necessary to change the initial value of the write voltage according to the writing page or according to the cell already written to and its adjacent cells. Moreover, the increase (or the step width) of the write voltage in rewriting has to be changed according to the initial value of the write voltage. Therefore, it is necessary to generate many write voltages. The write voltage is set according to the data supplied to the limiter circuit. Many items of data have to be stored according to many write voltages. These items of data are trimmed and set in testing a semiconductor memory device. It requires a long time to trim many items of data. Accordingly, a semiconductor memory device has been desired which can easily generate a plurality of voltages with a reduced number of items of data to be stored.